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4.8 CT60 XBIOS extension

• ct60_cache Activate/deactivate the 68060 caches.
• ct60_flush_cache Flush 68060 Caches.
• ct60_read_core_temperature Read the temperature of the 68060.
• ct60_rw_parameter Read or write a parameter in flash Eprom.
• ct60_vmalloc Memory allocation (Radeon driver).

4.8.1 ct60_cache

Name: »ct60_cache« - Activate/deactivate the 68060 caches.
 
Opcode: 50700 (0xc60c)
 
Syntax: int32_t ct60_cache( int16_t cache_mode );
 
Description: This XBIOS function is used to set or remove the 68060 caches inside the patched version of General.cpx.
 
Parameter Meaning
   
cache_mode  1 = Set the caches to on
 0 = Remove the caches
-1 = No change

Important:
Please use the CacheCtrl function.
 
Return value: Returns CACR.
 
Availability: TOS 4.04 patched for CT60 hardware acceleration board
 
Group: CT60 XBIOS extension
 
See also: Binding
 

4.8.1.1 Bindings for ct60_cache

C: int32_t ct60_cache( int16_t cache_mode );
 
Assembler:
  
move.w    cache_mode,-(sp); Offset 2
move.w    #$c60c,-(sp)    ; Offset 0
trap      #14             ; call XBIOS
addq.l    #4,sp           ; correct stack

4.8.2 ct60_flush_cache

Name: »ct60_flush_cache« - Flush 68060 Caches.
 
Opcode: 50701 (0xc60d)
 
Syntax: int32_t ct60_flush_cache( void );
 
Description: This XBIOS function is used to flush the instruction and data caches inside the patched version of Xcontrol.
 
Important:
Please use the CacheCtrl function.
 
Return value: E_OK (0)
 
Availability: TOS 4.04 patched for CT60 hardware acceleration board
 
Group: CT60 XBIOS extension
 
See also: Binding
 

4.8.2.1 Bindings for ct60_flush_cache

C: int32_t ct60_flush_cache( void );
 
Assembler:
  
move.w    #$c60d,-(sp)    ; Offset 0
trap      #14             ; call XBIOS
addq.l    #2,sp           ; correct stack

4.8.3 ct60_read_core_temperature

Name: »ct60_read_core_temperature« - Read the 68060 temperature.
 
Opcode: 50698 (0xc60a)
 
Syntax: int32_t ct60_read_core_temperature( int16_t type_deg );
 
Description: This XBIOS function reads the 68060 temperature.
 
type_deg: CT60_CELCIUS    0
CT60_FARENHEIT  1
Return value: The value or ERROR (-1) if there is a read error.
 
Availability: TOS 4.04 patched for CT60 hardware acceleration board.
 
Group: CT60 XBIOS extension
 
See also: Binding
 

4.8.3.1 Bindings for ct60_read_core_temperature

C: int32_t ct60_read_core_temperature( int16_t type_deg );
 
Assembler:
  
move.w    type_deg,-(sp)  ; Offset 2
move.w    #$c60a,-(sp)    ; Offset 0
trap      #14             ; call XBIOS
addq.l    #4,sp           ; correct stack

4.8.4 ct60_rw_parameter

Name: »ct60_rw_parameter« -Read or change a parameter inside the flash eprom.
 
Opcode: 50699 (0xc60b)
 
Syntax: int32_t ct60_rw_parameter( int16_t mode, int32_t type_param, int32_t value );
 
Description: This XBIOS function reads or changes a parameter inside the flash eprom. The function returns the value.
 
mode CT60_MODE_READ (0)
The value is read.
 
CT60_MODE_WRITE (1)
The value is write.
 
type_param CT60_PARAM_TOSRAM (0)
If the value is set to 1, the TOS is copied inside the SDRAM during boot (PMMU used and cookie PMMU created). If the value is set to 0, the TOS in flash eprom is used.
 
CT60_BLITTER_SPEED (1)
If the value is set to 0, the blitter runs a 8/10 MHz. If the value is set to 1, the blitter runs a 16/20 MHz.
 
CT60_CACHE_DELAY (2)
If the bit 0 of the value is cleared, the Pexec function is normal (flushes cache).
If the bit 0 of the value is set, the caches are disabled for 5 seconds when a program is started under TOS with the Pexec function.
If the bit 1 of the value is set, there are an Fread test and maybe a copyback alert if the code begin by $601A. With this alert you can remove the cache during 5 seconds.
If the bit 1 of the value is cleared, there is no copyback alert.
 
CT60_BOOT_ORDER (3)
New boot
If the value is set to 0, TOS boots from SCSI drives (0-7) before IDE drives (0-1).
If the value is set to 1, TOS boots from IDE drives (0-1) before SCSI drives (0-7).
If the value is set to 2, TOS boots from SCSI drives (7-0) before IDE drives (1-0).
If the value is set to 3, TOS boots from IDE drives (1-0) before SCSI drives (7-0).

 
Old boot
If the value is set to 4, TOS boots from SCSI drives (0-7) before IDE drives (0-1).
If the value is set to 5, TOS boots from IDE drives (0-1) before SCSI drives (0-7).
If the value is set to 6, TOS boots from SCSI drives (7-0) before IDE drives (1-0).
If the value is set to 7, TOS boots from IDE drives (1-0) before SCSI drives (7-0).

 
CT60_CPU_FPU (4)
If the bit 0 of the value is cleared, the FPU is disabled.
 
CT60_BOOT_LOG (5)
If the bit 0 is cleared, the stdout output of the AUTO folder files is writed inside a boot.log on the boot drive.
 
CT60_VMODE (6)
Boot extended modecode for CTPCI graphic card: F030 modecode + extended bits:
 

HORFLAG 0x200 for double width
HORFLAG2 0x400 for width increased
VESA_600 0x800 for SVGA 600
VESA_768 0x1000 for SVGA 768
VERTFLAG2 0x2000 for double height
BPS32 5 for True Color

CT60_SAVE_NVRAM_1 (7)
CT60_SAVE_NVRAM_2 (8)
CT60_SAVE_NVRAM_3 (9)
Reserved for TOS NVM backup, do not use.
 
CT60_PARAM_OFFSET_TLV (10)
value contains a signed offset in points. A point is equal to 2.8 °C.
 
CT60_ABE_CODE (11)
CT60_SDR_CODE (12)
Reserved for save ABE/SDR versions, do not use.
 
CT60_CLOCK (13)
CTPCM boot clock frequency in KHz (65000-110000)
WARNING, if you increase frequency !!!
 
CT60_PARAM_CTPCI (14)
If the bit 0 of the value is cleared, the TOS boot on the native F030 IDE port.
If the bit 0 of the value is set, the TOS boot n the CTPCI IDE port who replaces the F030 at the same address.
If the bit 1 of the value is cleared, the VDI not use the CTPCI PLX DMA (slower for vro_cpyfm).
If the bit 1 of the value is set, the VDI use the CTPCI PLX DMA (faster for vro_cpyfm).
 
Return value: The value or return:
 
EBADRQ (-5) if the parameter is >=15.
EWRITF (-10) for a write fault.
EUNDEV (-15) if the flash device is not found.
Availability: TOS 4.04 patched for CT60 hardware acceleration board.
 
Group: CT60 XBIOS extension
 
See also: Binding
 

4.8.4.1 Bindings for ct60_rw_parameter

C: int32_t ct60_rw_parameter( int16_t mode, int32_t type_param, int32_t value );
 
Assembler:
  
move.l    value,-(sp)     ; Offset 8
move.l    type_param,-(sp); Offset 4
move.w    mode,-(sp)      ; Offset 2
move.w    #$c60b,-(sp)    ; Offset 0
trap      #14             ; call XBIOS
lea       12(sp),sp       ; correct stack

4.8.5 ct60_vmalloc

Name: »ct60_vmalloc« - Memory allocation (Radeon driver).
 
Opcode: 50702 (0xc60e)
 
Syntax: int32_t ct60_vmalloc( int16_t mode, int32_t value )
 
Description: This function is used to allocate memory inside the offscreen area.
 

mode  
0 value <=> malloc size, return address or null
  if memory full
  value = -1 => return bytes free ct60_vmalloc(0, -1L).
1 value <=> address of previous malloc to free.
2 null value for init. (normally never used excepted
  by radeon.sys or VsetScreen)
Return value: Returns address or null if memory full.
 
Attention!
In all descriptions the return value is defined as int32_t. In reality the value can be higher. Therefore a uint32_t is better.
 
Availability: Only valid with internal TOS Radeon driver (PCI.HEX). TOS 4.04 patched for CT60 hardware acceleration board (2007-01-24).
Is also present if the Cookie SupV is there.
 
Group: CT60 XBIOS extension
 
See also: Binding
 

4.8.5.1 Bindings for ct60_vmalloc

C: int32_t ct60_vmalloc( int16_t mode, int32_t value );
 
Assembler:
  
move.l    value,-(sp)     ; Offset 4
move.w    mode,-(sp)      ; Offset 2
move.w    #$c60e,-(sp)    ; Offset 0
trap      #14             ; call XBIOS
addq.l    #8,sp           ; correct stack
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